1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253(*
* Copyright (c) 2022 Christiano Haesbaert <haesbaert@haesbaert.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*)externalget_ids:unit->intlist="caml_get_affinity"externalset_ids:intlist->unit="caml_set_affinity"lett=(* save oldset so we can restore later *)letoldset=get_ids()inlettopology=List.map(funid->set_ids[id];(* pin ourselves to one cpu *)let_,ebx,_,_=Amd64.cpuid1inletapicid=Int.shift_rightebx24in(* read this cpu apicid *)letsmt,core,socket=Amd64.decompose_apicapicidinlet_,_,_,edx=Amd64.cpuid7inletkind=ifAmd64.cpu_vendor="GenuineIntel"then(* only intel has hybrids *)lethybrid=edxlandInt.shift_left115<>0inifnothybridthenCpu.P_coreelseleteax,_,_,_=Amd64.cpuid0x1AinmatchInt.shift_right_logicaleax24with|0x20->Cpu.E_core|0x40->Cpu.P_core|_->Cpu.P_core(* best guess *)else(* AMD *)Cpu.P_coreinCpu.make~id~kind~smt~core~socket)oldsetinset_idsoldset;(* restore old set so we can run anywhere *)topology