Module Hardcaml.RecipeSource

Hardware generation in an imperative style.

This module is undergoing significant rewriting and refactoring, and subject to many breaking changes.

Sourcetype var
Sourcetype 'a t
include Base.Monad.S with type 'a t := 'a t
Sourceval (>>=) : 'a t -> ('a -> 'b t) -> 'b t

t >>= f returns a computation that sequences the computations represented by two monad elements. The resulting computation first does t to yield a value v, and then runs the computation returned by f v.

Sourceval (>>|) : 'a t -> ('a -> 'b) -> 'b t

t >>| f is t >>= (fun a -> return (f a)).

Sourcemodule Monad_infix : sig ... end
Sourceval bind : 'a t -> f:('a -> 'b t) -> 'b t

bind t ~f = t >>= f

Sourceval return : 'a -> 'a t

return v returns the (trivial) computation that returns v.

Sourceval map : 'a t -> f:('a -> 'b) -> 'b t

map t ~f is t >>| f.

Sourceval join : 'a t t -> 'a t

join t is t >>= (fun t' -> t').

Sourceval ignore_m : 'a t -> unit t

ignore_m t is map t ~f:(fun _ -> ()). ignore_m used to be called ignore, but we decided that was a bad name, because it shadowed the widely used Caml.ignore. Some monads still do let ignore = ignore_m for historical reasons.

Sourceval all : 'a t list -> 'a list t
Sourceval all_unit : unit t list -> unit t

Like all, but ensures that every monadic value in the list produces a unit value, all of which are discarded rather than being collected into a list.

Sourcemodule Let_syntax : sig ... end

These are convenient to have in scope when programming with a monad:

Sourceval skip : Base.unit t

skip 1 cycle

Sourceval wait : Base.int -> Base.unit t

skip n cycles

Sourceval par : ?comb_fin:Base.bool -> 'a t Base.list -> 'a Base.list t

Perform ts in parallel. comb_fin controls the finish signal generation. When false and extra cycle is taken after the ts complete to generate the fin signal. Otherwise extra combinatorial logic is generated to ensure the fin signal toggles on the same cycle as the last t to complete.

Sourceval par2 : ?comb_fin:Base.bool -> 'a t -> 'b t -> ('a * 'b) t
Sourceval (|||) : 'a t -> 'b t -> ('a * 'b) t
Sourceval cond : Signal.t -> 'a t -> 'b t -> Base.unit t

cond c t f performs t if c is high, otherwise performs f

Sourceval iter : Signal.t -> 'a t -> 'a t

iter c t perform t while c is high

Sourceval forever : 'a t -> 'a t

perform t forever

Sourceval wait_while : Signal.t -> Base.unit t

wait until t is low

Sourceval wait_until : Signal.t -> Base.unit t

wait until t is high

Sourceval follow : clock:Signal.t -> enable:Signal.t -> Signal.t -> 'a t -> Signal.t * 'a

follow t and get result

Sourceval new_var : ?name:Base.string -> Base.int -> var t

create an new n bit register

Sourceval read_var : var -> Signal.t t

read value of register

Sourceval assign : (var * Signal.t) Base.list -> Base.unit t

assign list of registers - takes 1 cycle

Sourceval write_var : var -> Signal.t -> Base.unit t

write register with value

Sourceval modify_var : (Signal.t -> Signal.t) -> var -> Base.unit t

modify current value of resgiter

Sourceval rewrite_var : (Signal.t -> Signal.t) -> var -> var -> Base.unit t

read a register, modify value, write a second register

Sourcemodule type Same = sig ... end
Sourcemodule Same (X : Interface.Pre) : Same with type 'a same = 'a X.t
Sourcemodule SVar : Same with type 'a same = 'a
Sourcemodule SList : Same with type 'a same = 'a Base.list
Sourcemodule SArray : Same with type 'a same = 'a Base.array
Sourcemodule STuple2 : Same with type 'a same = 'a * 'a
Sourcemodule STuple3 : Same with type 'a same = 'a * 'a * 'a