ARMSourceinclude module type of struct include Arm_types endval bin_write_cond :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ] ->
Bin_prot.Common.posval bin_writer_cond :
[< `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_cond__ :
'a ->
pos_ref:'b ->
int ->
[> `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ]val bin_read_cond :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ]val bin_reader_cond :
[> `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ]
Core_kernel.Bin_prot.Type_class.readerval bin_cond :
[ `AL
| `CC
| `CS
| `EQ
| `GE
| `GT
| `HI
| `LE
| `LS
| `LT
| `MI
| `NE
| `PL
| `VC
| `VS ]
Core_kernel.Bin_prot.Type_class.tval bin_write_nil_reg :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `Nil ] ->
Bin_prot.Common.posGeneral purpose registers
val bin_write_gpr_reg :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ] ->
Bin_prot.Common.posval bin_writer_gpr_reg :
[< `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_gpr_reg__ :
'a ->
pos_ref:'b ->
int ->
[> `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]val bin_read_gpr_reg :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]val bin_reader_gpr_reg :
[> `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]
Core_kernel.Bin_prot.Type_class.readerval bin_gpr_reg :
[ `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]
Core_kernel.Bin_prot.Type_class.tval bin_size_gpr_or_nil :
[< `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ] ->
intval bin_write_gpr_or_nil :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ] ->
Bin_prot.Common.posval bin_writer_gpr_or_nil :
[< `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP ]
Core_kernel.Bin_prot.Type_class.writerval bin_read_gpr_or_nil :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
gpr_or_nilconditition code registers
val bin_write_ccr_reg :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `CPSR | `ITSTATE | `SPSR ] ->
Bin_prot.Common.posval bin_read_ccr_reg :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `CPSR | `ITSTATE | `SPSR ]val bin_write_ccr_or_nil :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `CPSR | `ITSTATE | `Nil | `SPSR ] ->
Bin_prot.Common.posval bin_writer_ccr_or_nil :
[< `CPSR | `ITSTATE | `Nil | `SPSR ] Core_kernel.Bin_prot.Type_class.writerval bin_read_ccr_or_nil :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
ccr_or_nilval bin_size_non_nil_reg :
[< `CPSR
| `ITSTATE
| `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ->
intval bin_write_non_nil_reg :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `CPSR
| `ITSTATE
| `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ->
Bin_prot.Common.posval bin_writer_non_nil_reg :
[< `CPSR
| `ITSTATE
| `LR
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ]
Core_kernel.Bin_prot.Type_class.writerval bin_read_non_nil_reg :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
non_nil_regval bin_size_reg :
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ->
intval bin_write_reg :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ->
Bin_prot.Common.posval bin_writer_reg :
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ]
Core_kernel.Bin_prot.Type_class.writerval bin_size_op :
[< `Imm of Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ] ->
intval bin_write_op :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `Imm of Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ] ->
Bin_prot.Common.posval bin_writer_op :
[< `Imm of Bap.Std.word & Bap.Std.word
| `Reg of
[< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] & [< `CPSR
| `ITSTATE
| `LR
| `Nil
| `PC
| `R0
| `R1
| `R10
| `R11
| `R12
| `R2
| `R3
| `R4
| `R5
| `R6
| `R7
| `R8
| `R9
| `SP
| `SPSR ] ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_op__ :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
int ->
[> `Imm of Bap.Std.word | `Reg of reg ]val bin_read_op :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `Imm of Bap.Std.word | `Reg of reg ]val bin_reader_op :
[> `Imm of Bap.Std.word | `Reg of reg ]
Core_kernel.Bin_prot.Type_class.readertype move_insn = [ | `ADCri| `ADCrr| `ADCrsi| `ADCrsr| `ADDri| `ADDrr| `ADDrsi| `ADDrsr| `ANDri| `ANDrr| `ANDrsi| `ANDrsr| `BICri| `BICrr| `BICrsi| `BICrsr| `CMNri| `CMNzrr| `CMNzrsi| `CMNzrsr| `CMPri| `CMPrr| `CMPrsi| `CMPrsr| `EORri| `EORrr| `EORrsi| `EORrsr| `MOVTi16| `MOVi| `MOVi16| `MOVr| `MOVsi| `MOVsr| `MOVPCLR| `MVNi| `MVNr| `MVNsi| `MVNsr| `ORRri| `ORRrr| `ORRrsi| `ORRrsr| `RSBri| `RSBrr| `RSBrsi| `RSBrsr| `RSCri| `RSCrr| `RSCrsi| `RSCrsr| `SBCri| `SBCrr| `SBCrsi| `SBCrsr| `SUBri| `SUBrr| `SUBrsi| `SUBrsr| `TEQri| `TEQrr| `TEQrsi| `TEQrsr| `TSTri| `TSTrr| `TSTrsi| `TSTrsr ]val bin_write_move_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ] ->
Bin_prot.Common.posval bin_writer_move_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_move_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]val bin_read_move_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]val bin_reader_move_insn :
[> `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.readerval bin_move_insn :
[ `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr ]
Core_kernel.Bin_prot.Type_class.ttype bits_insn = [ | `BFC| `BFI| `PKHTB| `RBIT| `SBFX| `SWPB| `SXTAB| `SXTAH| `SXTB| `SXTH| `UBFX| `UXTAB| `UXTAH| `UXTB| `UXTH| `REV| `REV16 ]val bin_write_bits_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ] ->
Bin_prot.Common.posval bin_writer_bits_insn :
[< `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_bits_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]val bin_read_bits_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]val bin_reader_bits_insn :
[> `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]
Core_kernel.Bin_prot.Type_class.readerval bin_bits_insn :
[ `BFC
| `BFI
| `PKHTB
| `RBIT
| `REV
| `REV16
| `SBFX
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `UBFX
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]
Core_kernel.Bin_prot.Type_class.ttype mult_insn = [ | `MLA| `MLS| `MUL| `SMLABB| `SMLAD| `SMLAL| `SMLALBT| `SMLAWB| `SMUAD| `SMULBB| `SMULL| `SMULTB| `UMLAL| `UMULL ]val bin_write_mult_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ] ->
Bin_prot.Common.posval bin_writer_mult_insn :
[< `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_mult_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ]val bin_read_mult_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ]val bin_reader_mult_insn :
[> `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ]
Core_kernel.Bin_prot.Type_class.readerval bin_mult_insn :
[ `MLA
| `MLS
| `MUL
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `UMLAL
| `UMULL ]
Core_kernel.Bin_prot.Type_class.ttype mem_multi_insn = [ | `LDMDA| `LDMDA_UPD| `LDMDB| `LDMDB_UPD| `LDMIA| `LDMIA_UPD| `LDMIB| `LDMIB_UPD| `STMDA| `STMDA_UPD| `STMDB| `STMDB_UPD| `STMIA| `STMIA_UPD| `STMIB| `STMIB_UPD ]val bin_write_mem_multi_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ] ->
Bin_prot.Common.posval bin_writer_mem_multi_insn :
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_mem_multi_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ]val bin_read_mem_multi_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ]val bin_reader_mem_multi_insn :
[> `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ]
Core_kernel.Bin_prot.Type_class.readerval bin_mem_multi_insn :
[ `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD ]
Core_kernel.Bin_prot.Type_class.ttype mem_insn = [ | mem_multi_insn| `LDRBT_POST_IMM| `LDRBT_POST_REG| `LDRB_POST_IMM| `LDRB_POST_REG| `LDRB_PRE_IMM| `LDRB_PRE_REG| `LDRBi12| `LDRBrs| `LDRD| `LDRD_POST| `LDRD_PRE| `LDREX| `LDREXB| `LDREXD| `LDREXH| `LDRH| `LDRHTr| `LDRH_POST| `LDRH_PRE| `LDRSB| `LDRSBTr| `LDRSB_POST| `LDRSB_PRE| `LDRSH| `LDRSHTi| `LDRSHTr| `LDRSH_POST| `LDRSH_PRE| `LDRT_POST_REG| `LDR_POST_IMM| `LDR_POST_REG| `LDR_PRE_IMM| `LDR_PRE_REG| `LDRi12| `LDRrs| `STRBT_POST_IMM| `STRBT_POST_REG| `STRB_POST_IMM| `STRB_POST_REG| `STRB_PRE_IMM| `STRB_PRE_REG| `STRBi12| `STRBrs| `STRD| `STRD_POST| `STRD_PRE| `STREX| `STREXB| `STREXD| `STREXH| `STRH| `STRHTr| `STRH_POST| `STRH_PRE| `STRT_POST_REG| `STR_POST_IMM| `STR_POST_REG| `STR_PRE_IMM| `STR_PRE_REG| `STRi12| `STRrs ]val bin_write_mem_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs ] ->
Bin_prot.Common.posval bin_writer_mem_insn :
[< `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs LDMDA LDMDA_UPD LDMDB LDMDB_UPD LDMIA LDMIA_UPD LDMIB LDMIB_UPD STMDA STMDA_UPD STMDB STMDB_UPD STMIA STMIA_UPD STMIB STMIB_UPD ]
Core_kernel.Bin_prot.Type_class.writerval bin_write_branch_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ] ->
Bin_prot.Common.posval bin_writer_branch_insn :
[< `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_branch_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ]val bin_read_branch_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ]val bin_reader_branch_insn :
[> `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ]
Core_kernel.Bin_prot.Type_class.readerval bin_branch_insn :
[ `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc ]
Core_kernel.Bin_prot.Type_class.tval bin_write_special_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ] ->
Bin_prot.Common.posval bin_writer_special_insn :
[< `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ]
Core_kernel.Bin_prot.Type_class.writerval __bin_read_special_insn__ :
'a ->
pos_ref:'b ->
int ->
[> `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ]val bin_read_special_insn :
Bin_prot.Common.buf ->
pos_ref:Bin_prot.Common.pos_ref ->
[> `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ]val bin_reader_special_insn :
[> `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ]
Core_kernel.Bin_prot.Type_class.readerval bin_special_insn :
[ `CPS2p | `DMB | `DSB | `HINT | `MRS | `MSR | `PLDi12 | `SVC ]
Core_kernel.Bin_prot.Type_class.tval bin_size_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ] ->
intval bin_write_insn :
Bin_prot.Common.buf ->
pos:Bin_prot.Common.pos ->
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ] ->
Bin_prot.Common.posval bin_writer_insn :
[< `ADCri
| `ADCrr
| `ADCrsi
| `ADCrsr
| `ADDri
| `ADDrr
| `ADDrsi
| `ADDrsr
| `ANDri
| `ANDrr
| `ANDrsi
| `ANDrsr
| `BFC
| `BFI
| `BICri
| `BICrr
| `BICrsi
| `BICrsr
| `BL
| `BLX
| `BLX_pred
| `BLXi
| `BL_pred
| `BX
| `BX_RET
| `BX_pred
| `Bcc
| `CMNri
| `CMNzrr
| `CMNzrsi
| `CMNzrsr
| `CMPri
| `CMPrr
| `CMPrsi
| `CMPrsr
| `CPS2p
| `DMB
| `DSB
| `EORri
| `EORrr
| `EORrsi
| `EORrsr
| `HINT
| `LDMDA
| `LDMDA_UPD
| `LDMDB
| `LDMDB_UPD
| `LDMIA
| `LDMIA_UPD
| `LDMIB
| `LDMIB_UPD
| `LDRBT_POST_IMM
| `LDRBT_POST_REG
| `LDRB_POST_IMM
| `LDRB_POST_REG
| `LDRB_PRE_IMM
| `LDRB_PRE_REG
| `LDRBi12
| `LDRBrs
| `LDRD
| `LDRD_POST
| `LDRD_PRE
| `LDREX
| `LDREXB
| `LDREXD
| `LDREXH
| `LDRH
| `LDRHTr
| `LDRH_POST
| `LDRH_PRE
| `LDRSB
| `LDRSBTr
| `LDRSB_POST
| `LDRSB_PRE
| `LDRSH
| `LDRSHTi
| `LDRSHTr
| `LDRSH_POST
| `LDRSH_PRE
| `LDRT_POST_REG
| `LDR_POST_IMM
| `LDR_POST_REG
| `LDR_PRE_IMM
| `LDR_PRE_REG
| `LDRi12
| `LDRrs
| `MLA
| `MLS
| `MOVPCLR
| `MOVTi16
| `MOVi
| `MOVi16
| `MOVr
| `MOVsi
| `MOVsr
| `MRS
| `MSR
| `MUL
| `MVNi
| `MVNr
| `MVNsi
| `MVNsr
| `ORRri
| `ORRrr
| `ORRrsi
| `ORRrsr
| `PKHTB
| `PLDi12
| `RBIT
| `REV
| `REV16
| `RSBri
| `RSBrr
| `RSBrsi
| `RSBrsr
| `RSCri
| `RSCrr
| `RSCrsi
| `RSCrsr
| `SBCri
| `SBCrr
| `SBCrsi
| `SBCrsr
| `SBFX
| `SMLABB
| `SMLAD
| `SMLAL
| `SMLALBT
| `SMLAWB
| `SMUAD
| `SMULBB
| `SMULL
| `SMULTB
| `STMDA
| `STMDA_UPD
| `STMDB
| `STMDB_UPD
| `STMIA
| `STMIA_UPD
| `STMIB
| `STMIB_UPD
| `STRBT_POST_IMM
| `STRBT_POST_REG
| `STRB_POST_IMM
| `STRB_POST_REG
| `STRB_PRE_IMM
| `STRB_PRE_REG
| `STRBi12
| `STRBrs
| `STRD
| `STRD_POST
| `STRD_PRE
| `STREX
| `STREXB
| `STREXD
| `STREXH
| `STRH
| `STRHTr
| `STRH_POST
| `STRH_PRE
| `STRT_POST_REG
| `STR_POST_IMM
| `STR_POST_REG
| `STR_PRE_IMM
| `STR_PRE_REG
| `STRi12
| `STRrs
| `SUBri
| `SUBrr
| `SUBrsi
| `SUBrsr
| `SVC
| `SWPB
| `SXTAB
| `SXTAH
| `SXTB
| `SXTH
| `TEQri
| `TEQrr
| `TEQrsi
| `TEQrsr
| `TSTri
| `TSTrr
| `TSTrsi
| `TSTrsr
| `UBFX
| `UMLAL
| `UMULL
| `UXTAB
| `UXTAH
| `UXTB
| `UXTH ]
Core_kernel.Bin_prot.Type_class.writerMemory access operations
Types for single-register memory access
Types for multiple-register memory access
Types for data movement operations
shift types
include module type of struct include Arm_lifter endval lift : Bap.Std.lifterlift mem insn lifts instruction.
module CPU = Arm_lifter.CPUmodule Insn = Arm_insnmodule Cond = Arm_condmodule Reg = Arm_regmodule Op = Arm_op