Module Hardcaml.CircuitSource

Creation and manipulation of hardware circuits

Sourcetype t

circuit data structure

Sourceval sexp_of_t : t -> Sexplib0.Sexp.t
Sourcemodule Port_checks : sig ... end

Check if the ports specified in the interface match those defined in the circuit.

Sourcemodule Config : sig ... end
Sourceval create_exn : ?config:Config.t -> name:Base.string -> Signal.t Base.list -> t

create circuit data structure

Sourceval inputs : t -> Signal.t Base.list

return circuit inputs

Sourceval outputs : t -> Signal.t Base.list

return circuit outputs

Sourceval signal_graph : t -> Signal_graph.t
Sourceval name : t -> Base.string

return circuit name

Sourceval with_name : t -> name:Base.string -> t

Return identical circuit except for the name.

Sourceval is_input : t -> Signal.t -> Base.bool

is the signal an input to the circuit

Sourceval is_output : t -> Signal.t -> Base.bool

is the signal an output of the circuit

Sourceval find_signal_exn : t -> Signal.Type.Uid.t -> Signal.t
Sourceval set_phantom_inputs : t -> (Base.string * Base.int) Base.list -> t

For internal use. Add phantom input ports to the circuit when writing RTL. This can be necessary to ensure Interface based input specifications match those discovered when traversing the hardware design from its outputs. It is especially important when working with hierarchical designs.

Sourceval phantom_inputs : t -> (Base.string * Base.int) Base.list
Sourcemodule Signal_map : sig ... end

Map of uids to Signal.ts.

Sourceval signal_map : t -> Signal_map.t

Get map of uids to Signal.ts.

Compute and return a Fan_out_map.t. The computation is lazy and only performed the first time fan_out_map is called.

Compute and return a Fan_in_map.t. The computation is lazy and only performed the first time fan_in_map is called.

Sourceval structural_compare : ?check_names:Base.bool -> t -> t -> Base.bool

compare 2 circuits to see if they are the same

returns the list of instantiations in this circuit

Sourceval create_with_interface : (module Interface.S_Of_signal with type Of_signal.t = 'i) -> (module Interface.S_Of_signal with type Of_signal.t = 'o) -> ?config:Config.t -> name:Base.string -> ('i -> 'o) -> t
Sourcemodule With_interface (I : Interface.S) (O : Interface.S) : sig ... end