Module V_label.CompilerDirectiveSource

include module type of struct include Ls.CompilerDirective end
Sourcetype t = Verilog_parsing.Labels.CompilerDirective.t =
  1. | Define of Verilog_parsing.Common.identifier
  2. | Undef of Verilog_parsing.Common.identifier
  3. | Undefineall
  4. | Include of string
  5. | SysInclude of string
  6. | Timescale of string * string
  7. | Error of string
  8. | Line of string * string * string
  9. | Resetall
  10. | Default_nettypeNone
  11. | Default_nettype
  12. | Pragma of Verilog_parsing.Common.identifier
  13. | Begin_keywords of string
  14. | End_keywords
  15. | Default_decay_time of string
  16. | Default_trireg_strength of string
  17. | Delay_mode_distributed
  18. | Delay_mode_path
  19. | Delay_mode_unit
  20. | Delay_mode_zero
  21. | Celldefine
  22. | Endcelldefine
  23. | Unconnected_drive
  24. | Nounconnected_drive
Sourceval to_string : t -> string
Sourceval to_simple_string : t -> string
Sourceval to_tag : t -> string * (string * Verilog_parsing.Common.identifier) list
Sourceval anonymize : t -> t
Sourceval to_short_string : ?ignore_identifiers_flag:bool -> t -> string